Commit b3435a33 authored by John P. Willis's avatar John P. Willis
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Update markdown

parent bfc086b3
...@@ -26,7 +26,7 @@ registers employ big-endian byte ordering, as does main memory. ...@@ -26,7 +26,7 @@ registers employ big-endian byte ordering, as does main memory.
###Registers ###Registers
The CPU exposes sixteen general-purpose WORD registers, GA through GP. The CPU exposes sixteen general-purpose WORD registers, GA through GP.
The first five of these registers can also be accessed as ten eight-bit The first five of these registers can also be accessed as ten BYTE
registers, LA through LE, and HA through HE, where Lx and Hx represent registers, LA through LE, and HA through HE, where Lx and Hx represent
the low-order and high-order bytes of the corresponding Gx register, the low-order and high-order bytes of the corresponding Gx register,
respectively. respectively.
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