Commit bc1deedd authored by John P. Willis's avatar John P. Willis
Browse files

Catch up with XIBUS additions

parent e7fe1692
VM_OBJS = ilxi.o alu.o asm.o cpu.o error.o host.o storage.o lexer.o inst.o util.o console.o
XIASM_OBJS = xiasm.o asm.o cpu.o lexer.o storage.o inst.o error.o util.o console.o
FBCFLAGS = -g
VM_OBJS = ilxi.o asm.o cpu.o error.o host.o storage.o lexer.o inst.o util.o bus.o console.o
XIASM_OBJS = xiasm.o asm.o cpu.o lexer.o storage.o inst.o error.o util.o console.o bus.o
FBCFLAGS = -g -mt
#-d LEXDEBUG
all: vm assembler
all: vm assembler rom
vm: ilxi
rom: rom.bin xiasm
rom.bin: rom.xa
./xiasm rom.xa
assembler: xiasm
xiasm: $(XIASM_OBJS)
......@@ -18,12 +23,12 @@ xiasm.o: xiasm.bas
ilxi: $(VM_OBJS)
fbc $(FBCFLAGS) -x ilxi $(VM_OBJS)
alu.o: alu.bas
fbc $(FBCFLAGS) -o alu.o -c alu.bas
asm.o: asm.bas
fbc $(FBCFLAGS) -o asm.o -c asm.bas
bus.o: bus.bas
fbc $(FBCFLAGS) -o bus.o -c bus.bas
console.o: console.bas
fbc $(FBCFLAGS) -o console.o -c console.bas
......@@ -52,4 +57,4 @@ util.o: util.bas
fbc $(FBCFLAGS) -o util.o -c util.bas
clean:
rm -f *.o ilxi xiasm
rm -f *.o ilxi xiasm rom.bin
'
' bus.bas
'
' multithreaded XIBUS subsystem
'
#include "bus.bi"
#include "cpu.bi"
#include "storage.bi"
#include "error.bi"
sub bus_clear()
dim i as integer
for i = 0 to IOPORT_COUNT - 1
'
' -1 indicates that I/O port i is available
'
io_ports(i) = -1
next i
redim devices(1) as ubyte
dev_count = 0
end sub
sub bus_init()
dim i as integer
for i = 1 to dev_count
print "bus_init(): initializing device "; devices(i)
bus(devices(i)).dev_thread_started = 0
bus(devices(i)).dev_thread_stop_flag = 0
bus(devices(i)).dev_init()
next i
end sub
sub bus_start()
dim i as integer
for i = 1 to dev_count
print "bus_start(): starting device "; devices(i)
bus(devices(i)).dev_thread = threadcreate(@bus(devices(i)).dev_cycle)
bus(devices(i)).dev_thread_started = 1
next i
end sub
sub bus_stop()
dim i as integer
for i = 1 to dev_count
if bus(devices(i)).dev_thread_started = 1 then
bus(devices(i)).dev_thread_stop_flag = 1
print "bus_stop(): stopping device "; devices(i)
threadwait bus(devices(i)).dev_thread
bus(devices(i)).dev_thread_started = 0
bus(devices(i)).dev_thread_stop_flag = 0
end if
next i
end sub
sub bus_attach(device_number as ushort, dev as dev_entry)
dim port as ushort
'
' try to assign I/O ports to this device
'
for port = dev.io_base to dev.io_base + (dev.io_port_count - 1)
if io_ports(port) >= 0 then
print "bus_attach(): port "; port;
print " requested by device "; device_number;
print " already bound to device "; io_ports(port)
print "bus_attach(): failed for device "; device_number
exit sub
else
print "bus_attach(): allocating port "; port; " to device "; device_number
io_ports(port) = device_number
end if
next port
'
' port assignment successful; attach the device.
'
bus(device_number) = dev
dev_count += 1
redim preserve devices(dev_count) as ubyte
devices(dev_count) = device_number
end sub
function bus_input(port_number as ushort) as ushort
dim dev as dev_entry
if io_ports(port_number) >= 0 then
dev = bus(io_ports(port_number))
return dev.dev_input(port_number)
else
machine_error ERR_INVALID_IOPORT, 10
end if
end function
sub bus_output(port_number as ushort, value as ushort)
dim dev as dev_entry
if io_ports(port_number) >= 0 then
dev = bus(io_ports(port_number))
dev.dev_output(port_number, value)
else
machine_error ERR_INVALID_IOPORT, 10
end if
end sub
\ No newline at end of file
'
' bus.bi
'
#define BUS_SIZE 256
#define IOPORT_COUNT 65536
type dev_entry
dev_tag as string * 255
io_base as ushort
io_port_count as ushort
dev_init as sub()
dev_reset as sub()
dev_cycle as sub()
dev_input as function(port_number as ushort) as ushort
dev_output as sub(port_number as ushort, value as ushort)
dev_thread as any ptr
dev_thread_started as ubyte = 0
dev_thread_stop_flag as ubyte = 0
end type
dim shared bus(0 to BUS_SIZE - 1) as dev_entry
dim shared io_ports(0 to IOPORT_COUNT - 1) as short
dim shared devices() as ubyte
dim shared dev_count as ubyte = 0
declare sub bus_clear()
declare sub bus_init()
declare sub bus_start()
declare sub bus_stop()
declare sub bus_attach(device_number as ushort, dev as dev_entry)
declare sub bus_output(port_number as ushort, value as ushort)
declare function bus_input(port_number as ushort) as ushort
\ No newline at end of file
......@@ -4,6 +4,43 @@
#include "console.bi"
#include "storage.bi"
#include "bus.bi"
sub console_attach()
dim dev as dev_entry
with dev
.dev_tag = "ILXIM System Console"
.io_base = 0
.io_port_count = 4
.dev_init = @console_init
.dev_reset = @console_reset
.dev_cycle = @console_refresh
.dev_input = @console_input
.dev_output = @console_output
end with
bus_attach 0, dev
end sub
sub console_init()
end sub
sub console_reset()
end sub
function console_input(port_number as ushort) as ushort
return 0
end function
sub console_output(port_number as ushort, value as ushort)
end sub
sub console_refresh()
dim i as integer
......@@ -23,4 +60,6 @@ sub console_refresh()
end if
next i
sleep 25
end sub
\ No newline at end of file
......@@ -5,4 +5,9 @@
#define CONSOLE_WIDTH 80
#define CONSOLE_HEIGHT 25
declare sub console_attach()
declare sub console_init()
declare sub console_reset()
declare function console_input(port_number as ushort) as ushort
declare sub console_output(port_number as ushort, value as ushort)
declare sub console_refresh()
\ No newline at end of file
......@@ -8,6 +8,7 @@
#include "util.bi"
#include "inst.bi"
#include "console.bi"
#include "bus.bi"
sub init_cpu()
......@@ -52,9 +53,14 @@ sub init_cpu()
st_load_page "rom.bin", 0
bus_init
end sub
sub cpu()
bus_start
dim clock_count as long = 0
dim opcode as ubyte
......@@ -277,6 +283,8 @@ sub cpu()
loop
bus_stop
end sub ' cpu()
function cpu_fetch() as ubyte
......
......@@ -13,8 +13,9 @@
'
'
' 101-150: alu
' 101-150: i/o
'
#define ERR_INVALID_IOPORT 101
'
' 151-200: instruction decoder
......
......@@ -9,6 +9,7 @@
#include "asm.bi"
#include "util.bi"
#include "console.bi"
#include "bus.bi"
startup
......@@ -21,6 +22,9 @@ sub startup()
print " Copyright (C) 2015 Coherent Logic Development LLC"
print ""
bus_clear
console_attach
init_cpu
cli
......
;
; rom.xa
;
; ILXI ROM
; ILXIM ROM
;
; Copyright (C) 2015 Coherent Logic Development LLC
;
......@@ -22,7 +22,7 @@ LABEL __rom_start
BRANCH WORD {__rom_init}
;; DEFINES
VAR ZSTRING ROM_VS "ILXI ROM MONITOR V0.01 COPYRIGHT (C) 2015 COHERENT LOGIC DEVELOPMENT LLC"
VAR ZSTRING ROM_VS "ILXIM ROM MONITOR V0.01 COPYRIGHT (C) 2015 COHERENT LOGIC DEVELOPMENT LLC"
VAR WORD TERM_PTR 1
LABEL __rom_init
......@@ -39,7 +39,7 @@ LABEL __rom_init
COPY WORD %SI,{ROM_VS}
SCALL WORD {__term_print_string}
;;
;; HALT
;;
......
......@@ -69,6 +69,8 @@ sub do_asm(filename as string, argi as integer)
st_save_page output_file_name, argi
print ">>> FILE OUTPUT [INFO]: Produced "; output_file_name; " from "; filename
end sub
function read_source_file(filename as string) as integer
......
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